Power amplifier control

ABSTRACT

The present invention provides for power amplifier control of amplifier circuitry including an input stage and one or more output stages. The input stage is powered separately from the output stage by a relatively fixed power source. The one or more output stages are supplied with power via a voltage regulator having a controllable output voltage. A closed loop control integrated with the amplifier stages forces the voltage output of the voltage regulator to track the profile of an adjustable control signal, such as V RAMP .

BACKGROUND OF THE INVENTION

[0001] (1) Field of the Invention

[0002] The present invention relates to controlling the output power ofa multistage radio frequency power amplifier by adjusting the powersupply voltage level applied to the final stages of the power amplifier.

[0003] (2) Description of the Prior Art

[0004] In recent years, worldwide demand for wireless cellularcommunications has increased dramatically. Radiotelephones manufacturedto meet this burgeoning demand must adhere to standards such as theGlobal System for Mobile Communications (GSM) standard. Anotherstandard, the Digital Cellular System (DCS) standard is based on GSM,but is directed towards higher cell density and lower power. A thirdstandard, Personal Communications Services (PCS), is a “catch all” formany digital cellular systems, including GSM, operating in NorthAmerica. These standards all require precise output power control over alarge dynamic range in order to prevent a transmitter located in onecell from interfering with the reception of transmissions from othertransmitters in neighboring cells.

[0005] A key component common to all radiotelephones is a radiofrequency (RF) power amplifier. In modern digital radiotelephones, poweramplifiers receive as input a frequency or phase modulated radiofrequency carrier. The radio frequency carrier is what “carries” digitalinformation such as digitized voice or data to a cellular base station.Before reaching the power amplifier, the RF carrier is too weak to bereceived by a cellular base station. Therefore it is the function of thepower amplifier to boost the power of the RF carrier to a levelsufficient for reception by a cellular base station.

[0006] Unfortunately, a simple single fixed power level will not workwithin a cellular network. Mobile users transmitting while travelingthrough multiple cells at a single fixed high power setting wouldoverwhelm several cellular base stations. In contrast, a mobile usertransmitting at a low power setting would result in unreliableshort-range communication with perhaps a single cellular base station.To overcome this problem, engineers have designed radiotelephones withpower amplifiers having multiple adjustably selectable power levels.

[0007] Accurately and efficiently selecting and controlling output powerdelivered by an RF amplifier remains a formidable task. For example,prior art systems sample output power by diverting a portion of theiroutput power through the use of expensive components such as directionalcouplers. The diverted power is wasted, resulting in inefficiencyreducing battery life and talk time.

[0008] Furthermore, most prior art systems also detect the RF powersample with a peak power diode detector circuit used to rectify andsense forward power. Through the rectification process, there is somesquaring of the shape of the output power waveform. This squaring leadsto higher harmonic content. The higher harmonic content requiresadditional and costly filtering because harmonic frequencies must besuppressed in order to comply with international communicationregulations. Beyond detection, various other components are employed tocompare a reference power level to the detected RF power sample. Thesecomponents include buffers, attenuators, and passives, such asresistors.

[0009] Ultimately, a bias control circuit adjusts the gain of severalamplifier stages to adjust the output power to an appropriate level.Generally, prior art bias control circuits involve substantialcomplexity due to large variations in power control loop bandwidth. Mostoften, prior art power control systems dedicate costly ApplicationSpecific Integrated Circuits (ASICs) to provide complex bias adjustmentsnecessary to hold selected discrete power levels.

[0010] Another problem faced by conventional amplifier architectures isthat of power control loop stability. In prior art systems, the gainvaries widely across different power levels. It is common to find gainvarying tenfold on a decibel scale over a full range of power levels.Amplifier gain is often referred to as control slope when considered asa control variable.

[0011] Whenever a power control signal, commonly referred to as anadjustable power control signal or APC, is applied to bias controlcircuitry, a given amplifier gain should be established for a given APCvoltage. Unfortunately, highly nonlinear control slopes inherent inprior art systems are constantly changing due to external influencessuch as power supply fluctuations, temperature variations and outputload changes. As a result of highly nonlinear and inconsistent controlslope, it is difficult to design the proper control loop bandwidth tomaintain control loop stability over all control slope regions. Thisresults in increased design cycles, resulting in increased time tomarket.

[0012] In GSM radiotelephones, the adjustable power control signal mustcomply with a specification known as a “burst mask.” The burst maskspecifies the rise time, fall time, duration, and power levelsassociated with the adjustable power control signal. The GSM signalconsists of eight equal time slots. Each time slot must conform to theburst mask specification. Telephone software generates, by way of adigital-to-analog converter, an adjustable power control signal referredto as V_(RAMP). The ramp up time and ramp down time of V_(RAMP) mustconform to the shape of the burst mask. The amplitude of V_(RAMP)dictates output power.

[0013] Yet another problem common to the prior art is that ofinconsistent burst timing caused by input power fluctuations due tovariations of temperature and power supply voltage. Burst timing isdelayed with a decrease in input power and advanced with an increase ininput power. Prior art systems use software to attempt to correct thisproblem, causing valuable code space to be consumed as a result.

[0014] Still another problem manifests itself in the prior art due toundesirable switching transients that occur when the up and down ramp ofthe burst is not smooth or changes shape. These switching transientsalso occur if the control slope of the amplifier has an inflection pointwithin the output range, or if the slope is very steep. Consequently, itis difficult for a prior art system to change bias and gain in such away as to prevent switching transients.

[0015] Thus, there remains a need for a power amplifier module withpower loop control eliminating the need for traditional designs, whichincorporate directional couplers, detector diodes, and power controlASICs, along with the problems associated with the employment of suchdevices.

SUMMARY OF THE INVENTION

[0016] The present invention provides for power amplifier control ofamplifier circuitry including an input stage and one or more outputstages. The input stage is powered separately from the output stage by arelatively fixed power source. The one or more output stages aresupplied with power via a voltage regulator having a controllable outputvoltage. A closed loop control integrated with the amplifier stagesforces the voltage output of the voltage regulator to track the profileof an adjustable control signal, such as V_(RAMP).

[0017] The closed loop control preferably includes an error amplifier, afeedback network, and a linear voltage regulator. The error amplifiercompares a sample of regulator output voltage, scaled by the feedbacknetwork, with the voltage of the adjustable control signal. The voltagedifference between the sampled voltage and the control voltage signal isamplified by the error amplifier and applied as a control signal for thevoltage regulator. The control loop bandwidth is preferably high enoughthat for all practical purposes the voltage regulator instantaneouslyadjusts its output such that the voltage applied to the collector of theoutput amplifier stage corresponds to the control signal. Preferably,intermediate amplifier stages, which are series connected between theinput and output stages, are supplied with power by way of the samevoltage regulator controlled by the control loop.

[0018] Other aspects of the invention will become apparent to oneskilled in the art upon a reading of the following detailed descriptionof the invention, taken with the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawing figures incorporated in and forming apart of this specification illustrate several aspects of the invention,and together with the description serve to explain the principles of theinvention.

[0020]FIG. 1 is a schematic of a mobile terminal constructed accordingto the present invention.

[0021]FIG. 2 is a circuit diagram depicting the preferred embodiment ofthe present invention.

[0022]FIG. 3 is a graph that depicts the profile of the adjustable powercontrol signal V_(RAMP).

[0023]FIG. 4 is a graph depicting the relationship between output powerand the V_(RAMP) adjustable power control signal.

[0024]FIG. 5 is a graph showing power amplifier gain, also known ascontrol slope, for conventional prior art architecture.

[0025]FIG. 6 is a graph showing the control slope for the presentinvention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

[0026] Accurate and discrete power control can be achieved by varyingthe dc voltage supplied to the collectors or drains of the finalamplifier stages of a power amplifier. As opposed to the prior art,radio frequency (RF) output power for the present invention has verylittle dependence on frequency, temperature, or input power when thesupply voltage for the final amplifier stages is regulated to controloutput power. Adjusting the supply voltage rather than adjusting thebias of the amplifier stages results in smooth predictable control overthe full range of power. The circuitry used to implement the inventionmay be incorporated into a single semiconductor or may comprise multiplediscrete components.

[0027] The embodiments set forth below represent the necessaryinformation to enable those skilled in the art to practice the inventionand illustrate the best mode of practicing the invention. Upon readingthe following description in light of the accompanying drawing figures,those skilled in the art will understand the concepts of the inventionand will recognize applications of these concepts not particularlyaddressed herein. It should be understood that these concepts andapplications fall within the scope of the disclosure and theaccompanying claims.

[0028] The present invention is preferably incorporated in a mobileterminal 20, such a mobile telephone, personal digital assistant, or thelike. The basic architecture of a mobile terminal 20 is represented inFIG. 1 and may include a receiver front end 22, a radio frequencytransmitter section 24, an antenna 26, a duplexer or switch 28, abaseband processor 30, a control system 32, a frequency synthesizer 34,and an interface 36. The receiver front end 22 receives informationbearing radio frequency signals from one or more remote transmittersprovided by a base station. A low noise amplifier 37 amplifies thesignal. A filter circuit 38 minimizes broadband interference in thereceived signal, while a downconverter 40 downconverts the filtered,received signal to an intermediate or baseband frequency signal, whichis then digitized into one or more digital streams. The receiver frontend 22 typically uses one or more mixing frequencies generated by thefrequency synthesizer 34.

[0029] The baseband processor 30 processes the digitized received signalto extract the information or data bits conveyed in the received signal.This processing typically comprises demodulation, decoding, and errorcorrection operations. As such, the baseband processor 30 is generallyimplemented in one or more digital signal processors (DSPs).

[0030] On the transmit side, the baseband processor 30 receivesdigitized data from the control system 32, which it encodes fortransmission. The encoded data is output to the transmitter 24, where itis used by a modulator 42 to modulate a carrier signal that is at adesired transmit frequency. Power amplifier circuitry 44 amplifies themodulated carrier signal to a level appropriate for transmission fromthe antenna 26.

[0031] As described in further detail below, the power amplifiercircuitry 44 provides gain for the signal to be transmitted undercontrol of the power control circuitry 46, which is preferablycontrolled by the control system 32 using the V_(RAMP) signal 74.Preferably, the bias for the amplifier circuitry 44 is relatively stableregardless of power, and varying the voltage supplied to the amplifiercircuitry 44 controls actual power levels. The control system 32 mayalso provide a transmit enable (TX ENABLE) 94 to effectively turn thepower amplifier circuitry 44 and power control circuitry 46 on duringperiods of transmission.

[0032] A user may interact with the mobile terminal 20 via the interface36, which may include interface circuitry 48 associated with amicrophone 50, a speaker 52, a keypad 54, and a display 56. Theinterface circuitry 48 typically includes analog-to-digital converters,digital-to-analog converters, amplifiers, and the like. Additionally, itmay include a voice encoder/decoder, in which case it may communicatedirectly with the baseband processor 30.

[0033] The microphone 50 will typically convert audio input, such as theuser's voice, into an electrical signal, which is then digitized andpassed directly or indirectly to the baseband processor 30. Audioinformation encoded in the received signal is recovered by the basebandprocessor 30, and converted into an analog signal suitable for drivingspeaker 52 by the I/O and interface circuitry 48. The keypad 54 anddisplay 56 enable the user to interact with the mobile terminal 20,input numbers to be dialed, address book information, or the like, aswell as monitor call progress information.

[0034] Turning now to FIG. 2, the power amplifier circuitry 44 isassociated with power control circuitry 46. The power amplifiercircuitry 44 primarily includes three amplifier stages, a firstamplifier stage 60, a second amplifier stage 62, and a third amplifierstage 64, as well as a bias network 66 providing bias for each of thethree amplifier stages 60, 62, and 64. The power control circuitry 46will preferably include an error amplifier 68, a voltage regulator 70,and a feedback network 72.

[0035] An adjustable power control signal 74 (V_(RAMP)) may be receivedby a negative input 76 of an operational amplifier forming erroramplifier 68. The output 78 of the voltage regulator 70 is fed backthrough the feedback network 72 and received by positive input 80 oferror amplifier 68. An output signal 82 from error amplifier 68 isprovided to a control input 84 of the voltage regulator 70 that controlsthe regulated output 78 of voltage regulator 70. The voltage regulator70 regulates the voltage supplied to the rails 86, 88 of the second andthird amplifier stages 62, 64, respectively. These rails 86, 88 willtypically be the collectors or drains of bipolar or field effecttransistors forming the respective amplifier stages, as will beappreciated by those skilled in the art.

[0036] The rail 90 of first amplifier stage 60 is connected directly toa fixed or primary voltage supply V_(PRIM), which will preferably alsobe connected to the terminal for the positive potential of a battery.V_(PRIM) is also preferably connected to voltage regulator inputterminal 92. As noted, the bias network 66 preferably supplies a fixedbias to the three power amplifier stages 60, 62, 64, regardless of thecollector/drain voltage supplied to the second and third amplifierstages 62, 64. The fixed bias incorporates traditional V_(APC) signals,which are configured to maintain a constant bias.

[0037] A transmitter control signal 94, TX ENABLE, is a logic signalused to simultaneously enable or disable the error amplifier 68 and theamplifier circuitry 44, by removing the bias from each of the threeamplifier stages 60, 62, 64. A radio frequency signal to be amplified(RF_(IN)) is provided at the input 96 of the first stage amplifier 60and amplified by the three amplifier stages 60, 62, 64 to provide anamplified output signal 98 (RF_(OUT)) from the third amplifier stage 64.

[0038] The voltage profile of a typical V_(RAMP) signal is shown in FIG.3. The current embodiment of the invention limits the V_(RAMP) signal to+1.8V, however other embodiments of the invention may use less or morevoltage to drive the V_(RAMP) input. Turning now to FIG. 4, the outputpower level as a function of the V_(RAMP) signal of FIG. 3 isillustrated. Notably, the power level tracks the V_(RAMP) signal andranges from +5 dBm at the minimum to +35 dBm at the maximum for thepreferred embodiment.

[0039]FIG. 5 illustrates the non-linear relationship between anadjustable power control signal (V_(APC)), which typically controls biasto traditional amplifier circuitry of the prior art, and output power.Voltage gain is represented by the ratio of the RF output voltage to thepower control signal of the amplifier circuitry. The available outputvoltage of the amplifier circuitry corresponds to the output power.

[0040] In contrast, FIGS. 6 illustrates the linear relationship betweenV_(RAMP), which is used to control gain in the present invention, andthe actual output power. The present invention presents a much smallervariance in slope, eliminating loop stability problems and thenon-linear gain control characteristics. Furthermore, the loop bandwidthis determined only by internal bandwidth and RF output load, therefore,loop bandwidth does not change with respect to an output power level.

[0041] The present invention preferably incorporates an indirect closedloop voltage regulator to control the power transmitted by a triple-bandGSM/DCS/PCS power amplifier module. The indirectness of the closed loopmakes the method of control essentially invisible to third party designengineers. This simplifies phone design by eliminating the need forlengthy and complicated control loop design. Indeed, the indirect closedloop appears as an open loop to the user, and can be driven directlyfrom the output of a digital to analog converter.

[0042] Most prior art GSM power control systems either detect forwardpower or sense collector/drain current. The present invention does notuse a power detector; instead, a high-speed control may be incorporatedto regulate collector or drain voltages applied to the output stages ofthe amplifier, while the input stage is held at constant bias.

[0043] By regulating power delivered, the output stages are held insaturation across all power levels. Prior art control systems are unableto keep output stages saturated throughout all power levels. As powerlevels decrease from full power to zero, the collector or drain voltageapplied to the output stages is decreased. The relationship of outputpower versus collector voltage can be seen in Equation 1.$\begin{matrix}{P_{dBm} = {10 \cdot {\log \lbrack \frac{( {{2 \cdot V_{CC}} - V_{SAT}} )^{2}}{8 \cdot R_{LOAD} \cdot 10^{- 3}} \rbrack}}} & ( {{Eq}{.1}} )\end{matrix}$

[0044] Talk time and power management are key concerns in transmitterdesign, since power amplifiers account for the highest current draw in amobile radiotelephone. Considering only the power amplifier's efficiencydoes not provide a true assessment of total system efficiency. Effectiveefficiency must be considered. Effective efficiency factors in the lossbetween the power amplifier and antenna, and is a much better figure ofmerit for evaluating power management and talk time. Effectiveefficiency can be calculated with Equation 2, which follows.$\begin{matrix}{\eta_{EFF} = {\frac{{\sum\limits_{n = 1}^{m}P_{N}} - P_{IN}}{P_{DC}} \cdot 100}} & ( {{Eq}{.2}} )\end{matrix}$

[0045] Where P_(N) is the sum of all positive and negative RF power,P_(IN) is the input power and P_(DC) is the delivered DC power. Indecibels the formula becomes Equation 3. $\begin{matrix}{\eta_{EFF} = \frac{10^{\frac{P_{PA} + P_{LOSS}}{10}} - 10^{\frac{P_{IN}}{10}}}{V_{BAT} \cdot I_{BAT} \cdot 10}} & ( {{Eq}{.3}} )\end{matrix}$

[0046] Where P_(PA) is the output power from the power amplifier,P_(LOSS) is insertion loss, P_(IN) is input power to the poweramplifier, V_(BAT) is the battery or source voltage and I_(BAT) is thebattery or source current.

[0047] The present invention improves the effective efficiency byminimizing the PLOSS term in Equation 3. A directional coupler mayintroduce 0.4 dB to 0.5 dB insertion loss in the transmit path. Considerthe effective efficiency improvement provided by the present inventionas demonstrated by the following example: PRESENT VALUE PRIOR ARTINVENTION P_(PA) +33 dBm +33 dBm P_(IN) +6 dBm +6 dBm P_(LOSS) −0.4 dB 0dB V_(BAT) 3.5 V 3.5 V I_(BAT) 1.1 A 1.1 A η_(EFF) 47.2% 51.7%

[0048] In this example, the present invention improves efficiency byalmost 5%.

[0049] With the present invention, output power does not vary due tosupply voltage under normal operating conditions providing V_(RAMP) issufficiently lower than the source or battery voltage. Regulating therail voltage applied to the final amplifier stages practicallyeliminates voltage sensitivity.

[0050] Typically, V_(RAMP) will be sufficiently less than the sourcevoltage; however, as the source voltage gets lower due to batterydischarge and approaches its lower power range, the maximum output powerfrom the power amplifier will drop slightly. In this case, it isimportant to also decrease V_(RAMP) to prevent the power control loopfrom inducing switching transients. These switching transients occur asa result of the control loop slowing down and not regulating power as afunction of V_(RAMP). Compensating software controls switchingtransients due to low battery conditions for the extreme relationshipcovered by Equation 4.

V _(RAMP)≦0.375·Vcc+0.18  (Eq. 4)

[0051] Components coupled to the output of a power amplifier often haveinsertion losses that vary with respect to frequency. Heretofore, thirdparty design engineers have to consider these variations. Due to theirsensitivity to changes in frequency, directional couplers and detectordiodes create design constraints. Additional design constraints resultin increased design time. Fortunately, the present invention does notneed directional couplers or detector diodes to control powereffectively.

[0052] Input impedance variation is found in most GSM power amplifiers.This is due to the variations in base-emitter and collector-basecapacitance with respect to bias voltage. This can present a problem insome prior art designs by pulling the transmit voltage controlledoscillator (VCO) off frequency. This problem cannot exist in the presentinvention, because the bias point of the first or input amplifier stage60 is held constant. This presents a constant load to the VCO.

[0053] Noise power is often a problem when backing off power in priorart power amplifiers. The reason for this is that changing bias voltageschanges the gain in all stages, and according to the noise formula asrepresented by Equation 5, the noise figure depends on the noise factorand gain in all stages. As an improvement over the prior art, thepresent invention always keeps the gain to the first amplifier stage 60constant and high, therefore the overall noise power is not increasedwhen decreasing output power. $\begin{matrix}{F_{TOT} = {{F1} + \frac{{F2} - 1}{G1} + \frac{{F3} - 1}{{G1} \cdot {G2}}}} & ( {{Eq}{.5}} )\end{matrix}$

[0054] Additionally, the second and third amplifier stages 62, 64 arepreferably kept in saturation over all power levels. This prevents gainexpansion at decreasing output power and consequently avoids the problemof increasing noise at reduced power levels.

[0055] Power control circuitry stability often presents many challengesto transmitter design. Designing power control circuitry 46 involvesengineering trade-offs affecting stability, transient spectrum, andburst timing. In prior art systems the power amplifier gain, alsoreferred to as control slope, varies across different power levels, andas a result loop bandwidth also varies. With some power amplifiers it ispossible for control slope, measured in decibels per volt, to changetenfold. The challenge presented in designing mobile terminals 20incorporating prior art power amplifiers is keeping the loop bandwidthwide enough to meet burst mask specifications in low control sloperegions, while at the same time maintaining stability in high controlslope regions.

[0056] The present invention's control loop bandwidth is determined onlyby internal bandwidth and RF output load. Loop bandwidth does not changewith respect to power levels, because bias voltage does not vary, makingit easier to maintain loop stability with a high bandwidth loop.

[0057] With prior art power amplifiers, burst timing is affected whenthe input power from the VCO changes due to variations in temperature orsupply voltage. At low VCO power levels, the burst timing will bedelayed, requiring compensation by software. Code written to compensatefor burst timing delays takes up valuable code space that couldotherwise be used for additional phone features, or the like. Thepresent invention is insensitive to changes in input power as a resultof constant bias applied to the first amplifier stage 60; therefore,burst timing is constant and requires no compensation.

[0058] In the preferred embodiment, a simple CMOS voltage regulator withan on-resistance of less than 50 milliohms is used to adjust the voltageto the second and third amplifier stages 62, 64. Using a voltageregulator 70 with such low on-resistance greatly limits the efficiencydrop at full power. Furthermore, the voltage to the input or firstamplifier stage 60 of the amplifier circuitry 44 is unregulated in thepreferred embodiment. Not varying the rail 90 for the first amplifierstage 60 leads to a lesser effect on noise figure, as well as moreconstant input impedance.

[0059] Switching transients is another problem inherent in the priorart. Switching transients may occur when the rise and fall of the burstis not smooth. They may also result from inflection points sometimespresent within the output power range. The steepness of the controlslope itself can also make it difficult to prevent switching transients.The present invention prevents switching transients by constantlybiasing all power amplifier stages.

[0060] Undesirable harmonic frequencies are unavoidable products of highefficiency power amplifier design. An ideal class “F” saturated poweramplifier will produce a perfect square wave. Unfortunately, a squarewave has high harmonic content. This problem is compounded in prior artsystems by the use of peak power diodes used to rectify and senseforward power. The present invention addresses this problem byeliminating the need for a peak power diode. This is accomplished byeliminating most of the external components of traditional designs usedto control output power, including a power control ASIC, directioncoupler, buffers, attenuators, and various passive components.

[0061] One embodiment of the present invention includes at least twoamplifier stages, an input stage and an output stage. The input stage ispowered separately from the output stage by a relatively fixed powersource. The output stage is supplied with power by way of a voltageregulator 70 connected to a battery or some other source of dc power. Aclosed loop control integrated with the amplifier stages 60, 62, 64forces the voltage output of the voltage regulator 70 to track theprofile of the adjustable control signal 74, such as V_(RAMP).

[0062] The closed loop control includes an error amplifier 68, a voltagefeedback network, and a linear voltage regulator 70. The error amplifier68 compares a sample of regulator output voltage, scaled by a feedbacknetwork, with the voltage of the V_(RAMP) signal. The voltage differencebetween the sampled voltage and the V_(RAMP) voltage signal is amplifiedby the error amplifier 68 and applied as a control signal to the controlinput of the voltage regulator 70. The control loop bandwidth is highenough that for all practical purposes the voltage regulator 70instantaneously adjusts its output such that the voltage applied to thecollector of the output amplifier stage is of the same profile asV_(RAMP).

[0063] In another embodiment of the present invention, an intermediateamplifier stage is connected in series between the input and outputstages. This intermediate stage is supplied with power by way of thesame voltage regulator 70 controlled by the same control loop mentionedin the previous embodiment.

[0064] Further, a linearly controlled switching regulator may be used,which will increase the overall efficiency of the amplifier.

[0065] One benefit of the present invention is that the integratedclosed loop regulation is in essence hidden from the user. In otherwords, because of the integration, the user can use the invention as ifit had simple open loop control. As a result of this feature the presentinvention is much more easily implemented in mobile terminal design thanthe prior art allows.

[0066] Another benefit of the present invention is the simplicity of thecontrol slope curve. The control slope of prior art systems variesgreatly, making control loop stability tenuous at best for all powerlevels. Furthermore, the accuracy of any discrete power level isgoverned in part by how steep the control slope is at the region inwhich control is exercised.

[0067] Yet another benefit of the present invention deals with anoften-overlooked problem in power amplifier control loops, the problemof delay between the adjustable power control signal and the response ofchanging the output power. Also, because the input stage has fixed highgain, variations in RF input power due to temperature or supply voltagevariations do not cause burst timing to shift rightward in time. Forthese reasons, burst timing is constant in the present invention andrequires no software compensation.

[0068] Another benefit of the present invention is a reduction inexternal parts count, yielding a substantial savings in both price andboard space. The present invention does not require the use of adirectional coupler or any other type of radio frequency sampler ormeasurement. Additionally, the present invention does not incorporate apeak power diode detector present in many power control systems found inthe prior art. The lack of the peak power diode detector results in theadded benefit of reducing harmonic content of the output power frequencyspectrum. Moreover, the present invention can be controlled by softwarewithout having to use a costly power control ASIC interface. Thereduction of active components results in a reduction of passivecomponents such as resistors, capacitors, and inductors.

[0069] Alternative uses for the invention can be realized with amodulation technique known as log-polar modulation. Log-polar modulationconsists of amplitude and phase modulation applied to separate inputs.In the case of the present invention, phase modulation is applied to theamplifier input stage and amplitude modulation is superimposed on theV_(RAMP) signal.

[0070] Certain modifications and improvements will occur to thoseskilled in the art upon a reading of the foregoing description. Further,the present invention has been realized using particular combinations ofcomponents, i.e. resistors, capacitors, inductors, transistors, and thelike. It can also be appreciated that combinations of these componentsmay be interchangeable under specific conditions dependent upon factorssuch as operating frequency. It should be understood that all suchmodifications and improvements have been deleted herein for the sake ofconciseness and readability but are properly within the scope of thefollowing claims.

What is claimed is:
 1. A power amplifier configuration comprising: a)power control circuitry including a power regulator providing an outputvoltage at an output node responsive to an adjustable power controlsignal; and b) power amplifier circuitry including an input amplifierstage in series with an output amplifier stage for amplifying a radiofrequency input signal, the input amplifier stage receiving power from afixed voltage node and the output amplifier stage receiving power viathe output node of the power regulator; wherein the adjustable powercontrol signal is adjusted to control output power provided by the poweramplifier circuitry by controlling the voltage supplied to the outputamplifier stage.
 2. The power amplifier configuration of claim 1 furthercomprising bias circuitry for providing a constant bias to the input andoutput amplifier stages.
 3. The power amplifier configuration of claim 1wherein the power regulator is a voltage regulator.
 4. The poweramplifier configuration of claim 3 wherein the power regulator is alinear closed loop voltage regulator.
 5. The power amplifierconfiguration of claim 1 wherein the power control circuitry furthercomprises: a) an error amplifier having a first input for receiving theadjustable power control signal, a second input, and an output coupledto the power regulator to control the output voltage at the output node;and b) a feedback network coupled between the output node of the powerregulator and the second input of the error amplifier; wherein theoutput of the error amplifier is responsive to both the adjustable powercontrol signal and a voltage signal fed back from the output node of thepower regulator.
 6. The power amplifier configuration of claim 1 whereinthe power amplifier circuitry further comprises a second outputamplifier stage between and in series with the input and outputamplifier stages, the second output amplifier stage receiving power viathe output node of the power regulator such that the adjustable powercontrol signal is adjusted to control output power provided by the poweramplifier circuitry by controlling the voltage supplied to the outputamplifier stage and the second output amplifier stage.
 7. The poweramplifier configuration of claim 6 wherein the bias circuitry furtherprovides a constant bias to the second output amplifier stage.
 8. Amobile terminal comprising: a) a control system providing an adjustablepower control signal to control output power for transmitted radiofrequency signals; b) communication electronics associated with thecontrol system and comprising: i) power control circuitry including apower regulator providing an output voltage at an output node responsiveto an adjustable power control signal; and ii) power amplifier circuitryincluding an input amplifier stage in series with an output amplifierstage for amplifying a radio frequency input signal, the input amplifierstage receiving power from a fixed voltage node and the output amplifierstage receiving power via the output node of the power regulator;wherein the adjustable power control signal is adjusted to controloutput power provided by the power amplifier circuitry by controllingthe voltage supplied to the output amplifier stage.
 9. The mobileterminal of claim 8 further comprising bias circuitry for providing aconstant bias to the input and output amplifier stages.
 10. The mobileterminal of claim 8 wherein the power regulator is a voltage regulator.11. The mobile terminal of claim 10 wherein the power regulator is alinear closed loop voltage regulator.
 12. The mobile terminal of claim 8wherein the power control circuitry further comprises: a) an erroramplifier having a first input for receiving the adjustable powercontrol signal, a second input, and an output coupled to the powerregulator to control the output voltage at the output node; and b) afeedback network coupled between the output node of the power regulatorand the second input of the error amplifier; wherein the output of theerror amplifier is responsive to both the adjustable power controlsignal and a voltage signal fed back from the output node of the powerregulator.
 13. The mobile terminal of claim 8 wherein the poweramplifier circuitry further comprises a second output amplifier stagebetween and in series with the input and output amplifier stages, thesecond output amplifier stage receiving power via the output node of thepower regulator such that the adjustable power control signal isadjusted to control output power provided by the power amplifiercircuitry by controlling the voltage supplied to the output amplifierstage and the second output amplifier stage.
 14. The mobile terminal ofclaim 13 wherein the bias circuitry further provides a constant bias tothe second amplifier output stage.
 15. The mobile terminal of claim 8wherein the adjustable power control signal is V_(RAMP).
 16. Asemiconductor implementing a power amplifier configuration comprising:a) power control circuitry including a power regulator providing anoutput voltage at an output node responsive to an adjustable powercontrol signal; and b) power amplifier circuitry including an inputamplifier stage in series with an output amplifier stage for amplifyinga radio frequency input signal, the input amplifier stage receivingpower from a fixed voltage node and the output amplifier stage receivingpower via the output node of the power regulator; wherein the adjustablepower control signal is adjusted to control output power provided by thepower amplifier circuitry by controlling voltage supplied to the outputamplifier stage.
 17. The semiconductor of claim 16 further comprisingbias circuitry for providing a constant bias to the input and outputamplifier stages.
 18. The semiconductor of claim 16 wherein the powerregulator is a voltage regulator.
 19. The semiconductor of claim 18wherein the power regulator is a linear closed loop voltage regulator.20. The semiconductor of claim 16 wherein the power control circuitryfurther comprises: a) an error amplifier having a first input forreceiving the adjustable power control signal, a second input, and anoutput coupled to the power regulator to control the output voltage atthe output node; and b) a feedback network coupled between the outputnode of the power regulator and the second input of the error amplifier;wherein the output of the error amplifier is responsive to both theadjustable power control signal and a voltage signal fed back from theoutput node of the power regulator.
 21. The semiconductor of claim 16wherein the power amplifier circuitry further comprises a second outputamplifier stage between and in series with the input and outputamplifier stages, the second output amplifier stage receiving power viathe output node of the power regulator such that the adjustable powercontrol signal is adjusted to control output power provided by the poweramplifier circuitry by controlling voltage supplied to the outputamplifier stage and the second output amplifier stage.
 22. Thesemiconductor of claim 21 wherein the bias circuitry further provides aconstant bias to the second amplifier output stage.
 23. A methodcomprising: a) providing a regulated output voltage responsive to anadjustable power control signal; b) providing an input amplifier stagein series with an output amplifier stage for amplifying a radiofrequency input signal; c) providing power to the input amplifier stagefrom a fixed voltage node; and d) providing power to the outputamplifier stage via the regulated output voltage; wherein the adjustablepower control signal is adjusted to control output power provided bycontrolling voltage supplied to the output amplifier stage.
 24. Themethod of claim 23 further comprising providing a constant bias to theinput and output amplifier stages.
 25. The method of claim 23 furthercomprising: a) providing feedback from the regulated output voltage; andb) generating a voltage control signal to control the regulated outputvoltage responsive to both the adjustable power control signal andfeedback from the regulated output voltage.
 26. The method of claim 23wherein the amplifier circuitry further comprises providing a secondoutput amplifier stage between and in series with the input and outputamplifier stages, the second output amplifier stage receiving power viathe output node of the power regulator such that the adjustable powercontrol signal is adjusted to control output power provided by the poweramplifier circuitry by controlling voltage supplied to the outputamplifier stage and the second output amplifier stage.
 27. The method ofclaim 26 further comprising providing a constant bias to the secondamplifier output stage.